diff --git a/lib/llvm-ir.ts b/lib/llvm-ir.ts
index e5ece087b..54b058378 100644
--- a/lib/llvm-ir.ts
+++ b/lib/llvm-ir.ts
@@ -94,6 +94,8 @@ export class LlvmIrParser {
         this.symbolDefRes = [
             /^\s*(define|declare) .* @(?<name>[-a-zA-Z$._][-a-zA-Z$._0-9]*)\s*\(/,
             /^\s*(define|declare) .* @"(?<name>[^"]+)"\s*\(/,
+            /^\s*@(?<name>[-a-zA-Z$._][-a-zA-Z$._0-9]*)\s*=/,
+            /^\s*@"(?<name>[^"]+)"\s*=/,
         ];
         this.symbolRes = [/@(?<name>[-a-zA-Z$._][-a-zA-Z$._0-9]*)/dg, /@"(?<name>[^"]+)"/dg];
     }
diff --git a/test/llvm-ir-parser-cases/llvm-ir.ll.demangled b/test/llvm-ir-parser-cases/llvm-ir.ll.demangled
index 372df8ca3..e7ce35a8b 100644
--- a/test/llvm-ir-parser-cases/llvm-ir.ll.demangled
+++ b/test/llvm-ir-parser-cases/llvm-ir.ll.demangled
@@ -31,27 +31,46 @@
       "text": "",
     },
     {
-      "labels": [],
       "text": "@anon.f36d5c7f45057ddc2f9588b66728efc8.0 = private unnamed_addr constant <{ [8 x i8], [8 x i8] }> <{ [8 x i8] zeroinitializer, [8 x i8] undef }>, align 8",
     },
     {
-      "labels": [],
       "text": "@alloc_5f8966ccdf63990eeb3d1b59d49d4e62 = private unnamed_addr constant [7 x i8] c"hello: ", align 1",
     },
     {
-      "labels": [],
       "text": "@alloc_49a1e817e911805af64bbc7efb390101 = private unnamed_addr constant [1 x i8] c"\0A", align 1",
     },
     {
-      "labels": [],
+      "labels": [
+        {
+          "name": "alloc_5f8966ccdf63990eeb3d1b59d49d4e62",
+          "range": {
+            "endCol": 154,
+            "startCol": 116,
+          },
+        },
+        {
+          "name": "alloc_49a1e817e911805af64bbc7efb390101",
+          "range": {
+            "endCol": 237,
+            "startCol": 199,
+          },
+        },
+      ],
       "text": "@alloc_d535c95e835c6805448e14cd6baa16b3 = private unnamed_addr constant <{ ptr, [8 x i8], ptr, [8 x i8] }> <{ ptr @alloc_5f8966ccdf63990eeb3d1b59d49d4e62, [8 x i8] c"\07\00\00\00\00\00\00\00", ptr @alloc_49a1e817e911805af64bbc7efb390101, [8 x i8] c"\01\00\00\00\00\00\00\00" }>, align 8",
     },
     {
-      "labels": [],
       "text": "@alloc_0bd83ae4d998a852bdd6080f4dbcd402 = private unnamed_addr constant [16 x i8] c"/app/example.rs\00", align 1",
     },
     {
-      "labels": [],
+      "labels": [
+        {
+          "name": "alloc_0bd83ae4d998a852bdd6080f4dbcd402",
+          "range": {
+            "endCol": 140,
+            "startCol": 102,
+          },
+        },
+      ],
       "text": "@alloc_c26c07bead26123c9be372ecc3ac81e3 = private unnamed_addr constant <{ ptr, [16 x i8] }> <{ ptr @alloc_0bd83ae4d998a852bdd6080f4dbcd402, [16 x i8] c"\0F\00\00\00\00\00\00\00\02\00\00\00\05\00\00\00" }>, align 8",
     },
     {
@@ -121,7 +140,15 @@
       "text": "  store i64 2, ptr %0, align 8, !dbg !167",
     },
     {
-      "labels": [],
+      "labels": [
+        {
+          "name": "anon.f36d5c7f45057ddc2f9588b66728efc8.0",
+          "range": {
+            "endCol": 62,
+            "startCol": 23,
+          },
+        },
+      ],
       "scope": "!167",
       "source": {
         "column": 9,
@@ -131,7 +158,15 @@
       "text": "  %1 = load ptr, ptr @anon.f36d5c7f45057ddc2f9588b66728efc8.0, align 8, !dbg !167",
     },
     {
-      "labels": [],
+      "labels": [
+        {
+          "name": "anon.f36d5c7f45057ddc2f9588b66728efc8.0",
+          "range": {
+            "endCol": 94,
+            "startCol": 55,
+          },
+        },
+      ],
       "scope": "!167",
       "source": {
         "column": 9,
@@ -445,6 +480,13 @@
     },
     {
       "labels": [
+        {
+          "name": "alloc_d535c95e835c6805448e14cd6baa16b3",
+          "range": {
+            "endCol": 183,
+            "startCol": 145,
+          },
+        },
         {
           "name": "core::fmt::rt::<impl core::fmt::Arguments>::new_v1::h1b5b6f49e17440e0",
           "range": {
@@ -602,6 +644,13 @@
             "startCol": 14,
           },
         },
+        {
+          "name": "alloc_c26c07bead26123c9be372ecc3ac81e3",
+          "range": {
+            "endCol": 143,
+            "startCol": 105,
+          },
+        },
       ],
       "scope": "!217",
       "source": {
@@ -1372,6 +1421,12 @@
     },
   ],
   "labelDefinitions": {
+    "alloc_0bd83ae4d998a852bdd6080f4dbcd402": 15,
+    "alloc_49a1e817e911805af64bbc7efb390101": 13,
+    "alloc_5f8966ccdf63990eeb3d1b59d49d4e62": 12,
+    "alloc_c26c07bead26123c9be372ecc3ac81e3": 16,
+    "alloc_d535c95e835c6805448e14cd6baa16b3": 14,
+    "anon.f36d5c7f45057ddc2f9588b66728efc8.0": 11,
     "core::fmt::num::imp::<impl core::fmt::Display for i32>::fmt::ha5bd85893b48e317": 106,
     "core::fmt::rt::<impl core::fmt::Arguments>::new_v1::h1b5b6f49e17440e0": 20,
     "core::fmt::rt::Argument::new_display::hf32c8dfb2613a44d": 46,
diff --git a/test/llvm-ir-parser-cases/llvm-ir.ll.parsed b/test/llvm-ir-parser-cases/llvm-ir.ll.parsed
index 179bad221..38bc5e8f8 100644
--- a/test/llvm-ir-parser-cases/llvm-ir.ll.parsed
+++ b/test/llvm-ir-parser-cases/llvm-ir.ll.parsed
@@ -31,27 +31,46 @@
       "text": "",
     },
     {
-      "labels": [],
       "text": "@anon.f36d5c7f45057ddc2f9588b66728efc8.0 = private unnamed_addr constant <{ [8 x i8], [8 x i8] }> <{ [8 x i8] zeroinitializer, [8 x i8] undef }>, align 8",
     },
     {
-      "labels": [],
       "text": "@alloc_5f8966ccdf63990eeb3d1b59d49d4e62 = private unnamed_addr constant [7 x i8] c"hello: ", align 1",
     },
     {
-      "labels": [],
       "text": "@alloc_49a1e817e911805af64bbc7efb390101 = private unnamed_addr constant [1 x i8] c"\0A", align 1",
     },
     {
-      "labels": [],
+      "labels": [
+        {
+          "name": "alloc_5f8966ccdf63990eeb3d1b59d49d4e62",
+          "range": {
+            "endCol": 154,
+            "startCol": 116,
+          },
+        },
+        {
+          "name": "alloc_49a1e817e911805af64bbc7efb390101",
+          "range": {
+            "endCol": 237,
+            "startCol": 199,
+          },
+        },
+      ],
       "text": "@alloc_d535c95e835c6805448e14cd6baa16b3 = private unnamed_addr constant <{ ptr, [8 x i8], ptr, [8 x i8] }> <{ ptr @alloc_5f8966ccdf63990eeb3d1b59d49d4e62, [8 x i8] c"\07\00\00\00\00\00\00\00", ptr @alloc_49a1e817e911805af64bbc7efb390101, [8 x i8] c"\01\00\00\00\00\00\00\00" }>, align 8",
     },
     {
-      "labels": [],
       "text": "@alloc_0bd83ae4d998a852bdd6080f4dbcd402 = private unnamed_addr constant [16 x i8] c"/app/example.rs\00", align 1",
     },
     {
-      "labels": [],
+      "labels": [
+        {
+          "name": "alloc_0bd83ae4d998a852bdd6080f4dbcd402",
+          "range": {
+            "endCol": 140,
+            "startCol": 102,
+          },
+        },
+      ],
       "text": "@alloc_c26c07bead26123c9be372ecc3ac81e3 = private unnamed_addr constant <{ ptr, [16 x i8] }> <{ ptr @alloc_0bd83ae4d998a852bdd6080f4dbcd402, [16 x i8] c"\0F\00\00\00\00\00\00\00\02\00\00\00\05\00\00\00" }>, align 8",
     },
     {
@@ -121,7 +140,15 @@
       "text": "  store i64 2, ptr %0, align 8, !dbg !167",
     },
     {
-      "labels": [],
+      "labels": [
+        {
+          "name": "anon.f36d5c7f45057ddc2f9588b66728efc8.0",
+          "range": {
+            "endCol": 62,
+            "startCol": 23,
+          },
+        },
+      ],
       "scope": "!167",
       "source": {
         "column": 9,
@@ -131,7 +158,15 @@
       "text": "  %1 = load ptr, ptr @anon.f36d5c7f45057ddc2f9588b66728efc8.0, align 8, !dbg !167",
     },
     {
-      "labels": [],
+      "labels": [
+        {
+          "name": "anon.f36d5c7f45057ddc2f9588b66728efc8.0",
+          "range": {
+            "endCol": 94,
+            "startCol": 55,
+          },
+        },
+      ],
       "scope": "!167",
       "source": {
         "column": 9,
@@ -445,6 +480,13 @@
     },
     {
       "labels": [
+        {
+          "name": "alloc_d535c95e835c6805448e14cd6baa16b3",
+          "range": {
+            "endCol": 183,
+            "startCol": 145,
+          },
+        },
         {
           "name": "_ZN4core3fmt2rt38_$LT$impl$u20$core..fmt..Arguments$GT$6new_v117h1b5b6f49e17440e0E",
           "range": {
@@ -602,6 +644,13 @@
             "startCol": 14,
           },
         },
+        {
+          "name": "alloc_c26c07bead26123c9be372ecc3ac81e3",
+          "range": {
+            "endCol": 143,
+            "startCol": 105,
+          },
+        },
       ],
       "scope": "!217",
       "source": {
@@ -1379,6 +1428,12 @@
     "_ZN4core9panicking11panic_const24panic_const_mul_overflow17h3b9426197cab89a4E": 120,
     "_ZN7example4main17hf6eacbf6b45cf567E": 62,
     "_ZN7example6square17hc0cdb60f35a100bfE": 85,
+    "alloc_0bd83ae4d998a852bdd6080f4dbcd402": 15,
+    "alloc_49a1e817e911805af64bbc7efb390101": 13,
+    "alloc_5f8966ccdf63990eeb3d1b59d49d4e62": 12,
+    "alloc_c26c07bead26123c9be372ecc3ac81e3": 16,
+    "alloc_d535c95e835c6805448e14cd6baa16b3": 14,
+    "anon.f36d5c7f45057ddc2f9588b66728efc8.0": 11,
     "llvm.memcpy.p0.p0.i64": 109,
     "llvm.smul.with.overflow.i32": 116,
   },